1. Technical Field
The present invention relates to a nonvolatile semiconductor memory capable of electrically erasing and writing data.
2. Background Art
Conventionally, there has been known a nonvolatile semiconductor memory in which a single memory cell has two charge storage sections, and each charge storage section stores two values (“0”, “1”) so that the single memory cell has two-bit storage capacity. Such a memory cell has an n-type MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) structure, for example, and has two charge storage sections spaced apart from each other, i.e., on the drain side and the source side thereof. The state in which a charge is stored in the charge storage section is associated with data “0”, for example, and the state in which no charge is stored in the charge storage section is associated with data “1.” Thus, it becomes possible to store one-bit data in each charge storage section, i.e., two-bit data per memory cell. The writing, reading, and erasing of data with respect to such a memory cell are performed by a method to be described below, for example.
When writing data “0” to the charge storage section on the drain side, a positive voltage is applied to a drain terminal and a gate terminal, with a source terminal being at a ground voltage. Thus, hot electrons are injected into the charge storage section on the drain side and held therein, so that data “0” is written thereto.
When reading data from the charge storage section on the drain side, a positive voltage is applied to the source terminal and the gate terminal, with the drain terminal being at a ground voltage. In this case, when no charge is stored in the charge storage section on the drain side (i.e., when the charge storage section stores data “1”), a relatively large readout current is obtained. On the other hand, when a charge is stored in the charge storage section on the drain side (i.e., when the charge storage section stores data “0”), the readout current becomes smaller than that when data “1” is stored due to the influence of the stored charge. Since the presence/absence of a charge in the charge storage section causes a difference in the magnitude of the readout current as described above, it becomes possible to read data by determining the relative magnitude of the readout current.
When erasing data in the charge storage section on the drain side, a positive voltage is applied to the drain terminal, a ground voltage or a negative voltage is applied to the gate terminal, and the source terminal is set to an open state. Thus, hot holes generated in the vicinity of a drain region are injected into the charge storage section, and the charge stored in the charge storage section is neutralized, thereby erasing the data.
A nonvolatile semiconductor memory in recent years has a memory array formed by a plurality of MOSFETs, a plurality of bit lines connected to respective sources and drains of the MOSFETs, and a plurality of word lines connected to gates of the MOSFETs and extending perpendicularly to the bit lines. However, since a plurality of MOSFETs are arranged in such a nonvolatile semiconductor memory, there is a problem of a decrease in the writing efficiency. Moreover, since a write voltage is also applied via word lines to those MOSFETs which are connected to non-selected bit lines, a high (strong) electric field generated by such a voltage application causes fluctuation in the threshold voltage (word disturb). Japanese Patent Application Publication (Kokai) No. 2008-27522 discloses a nonvolatile semiconductor memory capable of solving such problems.
In recent years, another type of nonvolatile semiconductor memory has been developed, which includes two charge storage sections in each memory cell (MOSFET) and stores four values of data (“00”, “01”, “10”, “11”) in each charge storage section, thus providing 4-bit storage capacity per memory cell. The amount of injected charge is largest when storing “00”, the amount of injected charge is relatively large (second largest) when storing “01”, the amount of injected charge is relatively small (third largest) when storing “10”, and the amount of injected charge is zero when storing “11.” Storing of a desired value of data (i.e., 2 bits) in each charge storage section is realized by controlling the amount of charge to be stored in each charge storage section such that the amount of stored charge matches the desired value of data (00, 01, 10 or 11). The way of reading data is similar to that for 2-bit memory cells described above. Specifically, the value of data (00, 01, 10 or 11) is identified by reading the value of the readout current.
Since MOSFETs of memory cells have different characteristics from each other, the amount of time required for storing a predetermined amount of charge (i.e., the writing speed) differs from one MOSFET to another. Therefore, when simultaneously writing one of 4 different values of data to a plurality of memory cells, it is necessary to repeatedly inject a charge, read data, and compare the amount of charge calculated from the read data with the amount of charge to be stored, and to stop the injection of charge only for those MOSFETs for which the calculated amount of charge becomes greater than or equal to the amount of charge to be stored. Specifically, a charge is injected for a predetermined amount of time for each of those MOSFETs which are set to store “00”, “01” and “10,” and then data is read. The predetermined amount of time is substantially equal to the average amount of time which is taken before the amount of charge in a MOSFET reaches the amount of injected charge necessary for storing “10,” for example. Such charge injection and data reading are repeated, and the charge injection is stopped for a MOSFET that is scheduled to store “10” and that has the amount of injected charge for storing “10.” By repeating such charge injection and data reading and by stopping the charge injection for a MOSFET that has a scheduled amount of injected charge, all MOSFETs will have predetermined amounts of injected charge, thus completing the writing of the data to the entire nonvolatile semiconductor memory.
If charge injection and data reading are repeated, and the charge injection is stopped for any MOSFET, then the load of the nonvolatile semiconductor memory varies before and after the charge injection is stopped. This causes the varying of the amount of current flowing through the nonvolatile semiconductor memory and the MOSFETs. It is difficult to predict the variations in the amount of current because it is difficult to predict the amount of time necessary for each MOSFET to reach a predetermined amount of charge and because data to be written also varies depending on the use condition (operation condition) of the nonvolatile semiconductor memory.
If such variations in the amount of current occur, there may be a MOSFET into which the charge is injected excessively so that an amount of charge injected therein is larger than the predetermined amount of charge associated with data scheduled to be stored. With the variations in the load of the nonvolatile semiconductor memory, excessive current flows through the nonvolatile semiconductor memory so that an amount of charge associated with “01” or “00” is injected into a MOSFET into which an amount of charge associated with “10” should be injected.